GATE Electronics & Communication

The content of the registers are $R_1=25 \mathrm{H}, R_2=30 \mathrm{H}$ and $R_3 =40 \mathrm{H}$. The following machine instructions are executed. $$ \begin{aligned} & \operatornam...

In an 8085 microprocessor, the number of address lines required to access a 16 K bytes memory bank is $\_\_\_\_$ .

The following five instructions were executed on an 8085 microprocessor. MVI A, 33H MVI B, 78H ADD B CMA ANI 32H The Accumulator value immediately after the execution of the fifth...

The clock frequency of an 8085 microprocessor is 5 MHz. If the time required to execute an instruction is 1.4 $$\mu $$s, then the number of T-states needed for executing the instru...

In an 8085 system, a PUSH operation requires more clock cycles than a POP operation. Which one of the following options is the correct reason for this?

An 8 Kbyte ROM with an active low Chip Select input CS is to be used in an 8085 microprocessor based system. The ROM should occupy the address range 1000H to 2FFFH. Theaddress line...

In an 8085 microprocessor, the contents of the accumulator and the carry flag are A7 (in hex) and 0, respectively. If the instruction RLC is executed, then the contents of the accu...

In an 8085 microprocessor, the shift registers which store the result of an addition and the overflew bit are, respectively.

In an 8085 microprocessor, which one of the following instructions changes the content of the accumulator?

Which one of the following 8085 microprocessor programs correctly calculates the product of two 8-bit numbers stored in registers B and C?

An 8085 microprocessor executes “STA 1234H” with starting address location 1FFEH (STA copies the contents of the Accumulator to the 16-bit address location). While the instruction...

An 8085 assembly language program is given below. Assume that the carry flag is initially unset. The content of the accumulator after the execution of the program is MVI A,07H RLC...

For the 8085 assembly language program given below, the content of the accumulator after the executions of the program is 3000 MVI A, 45H 3002 MOV B, A 3003 STC 3004 CMC 3005 RAR 3...

An 8085 executes the following instructions 2710 LXI H, 30A0H DAD H PCHL All addresses and constants are in Hex. Let PC be the contents of the program counter and HL be the content...

An 8085 assembly language program is given below. Line 1: MVI A, B5H 2: MVI B, 0EH 3: XRI 69H 4: ADD B 5: ANI 9BH 6: CPI 9FH 7: STA 3010H 8: HLT The contents of the accumulator jus...

An 8085 assembly language program is given below. Line 1: MVI A, B5H 2: MVI B, 0EH 3: XRI 69H 4: ADD B 5: ANI 9BH 6: CPI 9FH 7: STA 3010H 8: HLT After execution of line of the prog...

Following is the segment of a 8085 assembly Language program: LXI SP, EFFF H CALL 3000 H 3000H: LXI H, 3CF4H PUSH PSW SPHL POP PSW RET On completion of RET execution, the contents...

Consider an 8085 microprocessor system If in addition following code exists from 0109H onwards ORI 40H, ADD M What will be the result in the accumulator after the last instruction...

Consider an 8085 microprocessor system The following program starts at locaton 0100H. LXI SP, 00FF LXI H, 0107 MVI A, 20H SUB M The contents of accumulator wnen the program counter...

The number of memory cycles required to execute the following 8085 instructions (I.) LDA 3000H (II.) LXI D, FOF 1H Would be

Consider the sequence of 8085 instructions given below. LXI H, 9258 MOV A, M CMA MOV M, A Which one of the following is performed by this sequence?

It is desired to multiply the numbers 0AH by 0BH and store the result in the accumulator. The numbers are available in registers B and C respectively. A part of the 8085 program fo...

The 8255 Programmable Peripheral Interface is used as described below. I. An A/D converter is interfaced to a microprocessor through an 8255. the conversion is initiated by a signa...

In an 8085 microprocessor, the instruction CMP B has been executed while the content of the accumulator is less than that of register B. As a result

The contents of Register (B) and Accumulator (A) of 8085 microprocessor are 49H and 3AH respectively. The contents of A and the status of carry flag (CY) and sign flag (S) after ex...

An 8085 microprocessor based system uses a 4K × 8-bit RAM whose starting address is AA00H. The address of the last byte in this RAM is

In the 8085 microprocessor, the RST6 instruction transfers the program execution to the following location

The number of hardware interrupts (which require an external signal to interrupt) present in an 8085 microprocessor are

If $$CS\;=\overline{A_{15}}\;A_{14}\;A_{13}$$ is used as the chip select logic of a 4K RAM in an 8085 system, then its memory range will be

An I/O processor control the flow of information between

An instruction used to set the carry flag in a computer can be classified as

In an 8085$$\mu$$P system, the RST instruction will cause an interrupt

The total number of memory accesses involved (inclusive of the op-code fetch) when an 8085 processor executes, the instruction LDA 2003 is

The following sequence of instructions are executed by an 8085 microprocessor: 1000: LXI SP< 27FF 1003: CALL 1006 1006: POP H The contents of the stack pointer (SP) and the HL regi...

In a microprocessor, when a CPU is interrupted, it

An 'Assembler' for a microprocessor a used for

In a microprocessor, the register which holds the address of the next instruction to be fetched is

In a microcomputer, wait states are used to

In an 8085 microprocessor system with memory mapped I/O,

The program given below is run on an 8085 based microcomputer system. Determine the contents of the registers: PC, SP, B, C, H, L after a half instruction is executed. LOC 2000 STA...

In a microprocessor system, the stack is used for

In register index addressing mode the effective address is given by

A microprocessor with a 16-bit address bus is used in a linear memory selection configuration (i.e. Address bus lines are directly used as chip selects of memory chips) with 4 memo...

For a microprocessor system using I/O-mapped I/O the following statement(s) is NOT true