Skip to content
Early access — you're among the first to try PYQLabs. Share feedback
Concept drill

sample-and-hold

GATE Electrical Engineering · Op-Amp-EE · 2001-2001

1
PYQs
100%
keyed
0
elite explanations
1
years appeared

Study anchor

Source-book anchor pending for this concept.

Practice action

Start latest PYQ

PYQs in this concept

All concepts →
2001 PYQ

A sample-and-hold $$(S/H)$$ circuit, having a holding capacitor of $$0.1$$ $$nF,$$ is used at the input of an $$ADC$$ (analog-to-digital converter). The conversion time of the $$AD...

mediumanswer key