Concept drill
dual-slope
GATE Electrical Engineering · Sequential-EE · 1995-2000
2
PYQs
100%
keyed
0
elite explanations
2
years appeared
Study anchor
Source-book anchor pending for this concept.
Practice action
Start latest PYQPYQs in this concept
All concepts →2000 PYQ
A dual-slope analog-to-digital converter uses an $$N$$-bit counter. When the input signal $${V_a}$$ is being integrated, the counter is allowed to count up to a value:
mediumanswer key
1995 PYQ
A $$3{1 \over 2}\,$$ digit, $$2$$ $$V$$ full scale slope $$ADC$$ has its integration time set to $$300$$ $$ms.$$ If the input to the $$ADC$$ is ($$1$$+$$1sin$$ $$314$$ $$t$$) V, th...
mediumanswer key