Sequential

The content of the registers are $R_1=25 \mathrm{H}, R_2=30 \mathrm{H}$ and $R_3 =40 \mathrm{H}$. The following machine instructions are executed. $$ \begin{aligned} & \operatorname{PUSH}\left\{R_1\right\} \\ & \operator...

A traffic signal cycles from GREEN to YELLOW, YELLOW to RED and RED to GREEN. In each cycle, GREEN is turned on for 70 seconds, YELLOW is turned on for 5 seconds and the RED is turned on for 75 seconds. This traffic ligh...

The clock frequency of an 8085 microprocessor is 5 MHz. If the time required to execute an instruction is 1.4 $$\mu $$s, then the number of T-states needed for executing the instruction is

In an 8085 microprocessor, the contents of the accumulator and the carry flag are A7 (in hex) and 0, respectively. If the instruction RLC is executed, then the contents of the accumulator (in hex) and the carry flag, res...

In an 8085 system, a PUSH operation requires more clock cycles than a POP operation. Which one of the following options is the correct reason for this?

In an 8085 microprocessor, the shift registers which store the result of an addition and the overflew bit are, respectively.

Which one of the following 8085 microprocessor programs correctly calculates the product of two 8-bit numbers stored in registers B and C?

In an 8085 microprocessor, which one of the following instructions changes the content of the accumulator?

An 8085 microprocessor executes “STA 1234H” with starting address location 1FFEH (STA copies the contents of the Accumulator to the 16-bit address location). While the instruction is fetched and executed, the sequence of...

An 8085 assembly language program is given below. Assume that the carry flag is initially unset. The content of the accumulator after the execution of the program is MVI A,07H RLC MOV B,A RLC RLC ADD B RRC

Two D flip-flops are connected as a synchronous counter that goes through the following Q B Q A sequence $$00 \to 11 \to 01 \to 10 \to 00 \to ......$$

For the 8085 assembly language program given below, the content of the accumulator after the executions of the program is 3000 MVI A, 45H 3002 MOV B, A 3003 STC 3004 CMC 3005 RAR 3006 XRA B

An 8085 executes the following instructions 2710 LXI H, 30A0H DAD H PCHL All addresses and constants are in Hex. Let PC be the contents of the program counter and HL be the contents of the HL register pair just after exe...

The present output Q n of an edge triggered JK flip-flop is logic 0. If J=1, then Q n+1

Choose the correct one from among the alternatives A, B, C, D after matching an item from Group 1 with the most appropriate item in Group 2. Group1 P. shift register Q. Counter R. Decoder Group2 1. Frequency division 2....

A master slave flip-flop has the characteristic that

It is desired to multiply the numbers 0AH by 0BH and store the result in the accumulator. The numbers are available in registers B and C respectively. A part of the 8085 program for this purpose is given below: MVI A, 00...

A 4 bit ripple counter and a 4 bit synchronous counter are made using flip-flops having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively...

In an 8085 microprocessor, the instruction CMP B has been executed while the content of the accumulator is less than that of register B. As a result

A 0 to 6 counter consist of 3 flip-flops and a combination circuit of 2 input gate(s). The combination circuit consists of

The number of hardware interrupts (which require an external signal to interrupt) present in an 8085 microprocessor are

The circuit diagram of a synchronous counter is shown in the figure. Determine the sequence of states of the counter assuming that the initial state is ‘000’. Give your answer in a tabulor form showing the present state...

An instruction used to set the carry flag in a computer can be classified as

In an 8085$$\mu$$P system, the RST instruction will cause an interrupt

The following sequence of instructions are executed by an 8085 microprocessor: 1000: LXI SP< 27FF 1003: CALL 1006 1006: POP H The contents of the stack pointer (SP) and the HL register pair on completion or execution of...

A switch-tail ring counter is made by using a single D flip-flop. The resulting circuit is a

In a microprocessor, when a CPU is interrupted, it

Synchronous counters are _____ than the ripple counters.

A pulse train with a frequency of 1 MHz is counted using a modulo-1024 ripple-counter built with J-K flip flops. For proper operation of the counter, the maximum permissible propagation delay per flip flop stage is _____...

In a microprocessor, the register which holds the address of the next instruction to be fetched is

A new clocked "X-Y" flip-flop is defined with two inputs, X and Y in addition to the clock input. The flip-flop functions as follows: If XY=00, the flip-flop changes stage with each clock pulse. If XY=01, the flip-flop s...

A SR FLIP-FLOP can be converted into a T FLIP-FLOP by connecting ___ to Q and ___ to $$\overline Q $$.

The program given below is run on an 8085 based microcomputer system. Determine the contents of the registers: PC, SP, B, C, H, L after a half instruction is executed. LOC 2000 START: LXI SP, 1000H LXI H, 2F37 H XRA A MO...

A 4 bit modulo-16 ripple counter uses JK flip-flops. If the propagation delay of each FF is 50ns, the maximum clock frequency that can be used is equal to: