Logic Families
GATE Electronics & Communication · 16 questions across 10 years (1987-2022) · 25% recurrence rate
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1987–2022Difficulty mix
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All 16 questions on Logic Families
Select the correct statement(s) regarding CMOS implementation of NOT gates.
The full forms of the abbreviations TTL and COMS in reference to logic families are
The output of the 74 series of TTL gates is taken from a BJT in
A Darlington Emitter follower circuit is sometimes used in the output stage of a TTL gate in order to
Commercially available ECL gates use two ground lines and one negative supply in order to
The noise margin of a TTL gate is about
The inverter 74AL SO4 has the following specifications: $${I_{OH}}{\,_{\max \,}} = \, - $$ 0.4mA, $${I_{OL}}$$ max = 8mA, $${I_{IH}}$$ max = $$\mu $$A , $${I_{IL\,}}_{\max \,}$$=0.1mA. The fan out based on the above will...
In standard TTL the 'totem pole' stage refers to
The gate delay of an NMOS inverter is dominated by charge time rather than discharge time because
In the output stage of a standard TTL, we have a diode between the emitter of the pull up transistor and the collector of the pull-down transistor. The purpose of this diode is to isolate the output node from the power s...
A ring oscillator consisting of 5 inverters is running at a frequency of 1.0 MH$$_z$$. The progagation delay per gate is ______
A logic family has threshold voltage $${V_T}$$= 2V, minimum guaranteed output high voltage $${V_{OH}}$$= 4V, minimum accepted input high voltage $${V_{IH}}$$ = 3V, maximum guaranteed output low voltage $${V_{OL}}$$ = 1V,...
Among the digital IC-families-ECL, TTL and CMOS:
Implement the function $$F=\left(\overline A+\overline B\right)\left(\overline C+\overline D\right)$$ using two open collector TTL 2-input NAND gates.
Fill in the blanks of the statements below concerning the following Logic Families: Standard TTL (74XX), Low power TTL(74LXX) Low power schottky TTL(74LSXX), schottky TTL(74 SXXX), Emitter coupled Logic (ECL), CMOS (a) A...
Given that for a logic family, $${V_{OH}}$$ is the minimum output high-level voltage $${V_{OL}}$$ is the minimum output low-level voltage $${V_{IH}}$$ is the minimum output high-level voltage and $${V_{IL}}$$ is the mini...