Combinational

A 4-bit priority encoder has inputs $D_3, D_2, D_1,$ and $D_0$ in descending order of priority. The two-bit output $AB$ is generated as 00, 01, 10, and 11 corresponding to inputs $D_3, D_2, D_1,$ and $D_0$, respectively....

Addressing of a $32 K \times 16$ memory is realized using a single decoder. The minimum number of AND gates required for the decoder is :

If X and Y are inputs and the Difference (D = X – Y) and the Borrow (B) are the outputs, which one of the following diagrams implements a half-subtractor?

In a half-subtractor circuit with X and Y as inputs, the Borrow (M) and Difference (N = X - Y) are given by

The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is

What are the minimum number of 2-to 1 multiplexers required to generate a 2-input AND gate and a 2-input EX-OR gate?

The minimum number of 2 to 1 multiplexers required to realize a 4 to 1 mutliplexer is

With out any additional circuitry, an 8:1 MUX can be used to obtain

For a binary half-subtractor having two inputs A and B, the correct set of Logical expressions for the output D(=Aminus B) and X(=Borrow) are

For a binary half-sub-tractor having two inputs A and B, the correct set of logical expressions for the outputs D (=A minus B) and X (=borrow) are

A 2-bit binary multiplier can be implemented using

A Boolean function, F , given as sum of product (SOP) terms as F= $$\sum {} $$m(3,4,5,6) with A,B, and C as inputs. The function, F, can be expreeed on the Karnaugh's map shown below. (1) What will be the minimized SOP e...

Signals A,B,C,D and $$\overline D $$ are available. Using a single 8 - to - 1 multiplexer and no other gate, implement the Boolean function. $$f(A,B,C,D) = B.C + A.B.\bar D + \bar A.\bar C.\bar D$$