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ADC/DAC

GATE Electronics & Communication · 16 questions across 14 years (1994-2025) · 35% recurrence rate

Recurrence sparkline

19942025
199420102025

Difficulty mix

easy 63%
med 38%

Question types

MCQ9
NAT5
MTF2

All 16 questions on ADC/DAC

2025 PYQ

A 10-bit analog-to-digital converter (ADC) has a sampling frequency of 1 MHz and a full scale voltage of 3.3 V . For an input sinusoidal signal with frequency 500 kHz , the maximum SNR (in dB, rounded off to two decimal...

Easy
2024 PYQ

A full scale sinusoidal signal is applied to a 10-bit ADC. The fundamental signal component in the ADC output has a normalized power of 1 W, and the total noise and distortion normalized power is 10 $\mu$W. The effective...

Med
2023 PYQ

The signal-to-noise ratio (SNR) of an ADC with a full-scale sinusoidal input is given to be 61.96 dB. The resolution of the ADC is __________ bits (rounded off to the nearest integer).

Easy
2023 PYQ

A sample and hold circuit is implemented using a resistive switch and a capacitor with a time constant of 1 $$\mu$$s. The time for the sampling switch to stay closed to charge a capacitor adequately to a full scale volta...

Med
2021 PYQ

An 8-bit unipolar (all analog output values are positive) digital-to-analog converter (DAC) has a full-scale voltage range from 0 V to 7.68 V . If the digital input code is 10010110 (the leftmost bit is MSB). Then the an...

Easy
2020 PYQ

A 10 bit D/A converter is calibrated over the full range 0 to 10 V . If the input to the D/A converter is 13 A (in hex), the output (rounded off to three decimal places) is $\_\_\_\_$ V.

Med
2015 PYQ

Consider a four bit D to A converter. The analog value corresponding to digital signals of values 0000 and 0001 are 0 V and 0.0625 V respectively. The analog value (in Volts ) corresponding to the digitals signal 1111 is...

Easy
2014 PYQ

For a given sample-and-hold circuit, if the value of the hold capacitor is increased, then

Easy
2004 PYQ

The 8255 Programmable Peripheral Interface is used as described below. I. An A/D converter is interfaced to a microprocessor through an 8255. the conversion is initiated by a signal from the 8255 on Port C. A signal on P...

Med
2002 PYQ

The number of comparators required in a 3-bit comparator type ADC is

Easy
2000 PYQ

The number of comparators in 4-bit flash ADC is

Easy
1999 PYQ

The resolution of a 4-bit counting ADC is 0.5 Volts. For an analog input of 6.6 Volts, the digital output of the ADC will be

Easy
1998 PYQ

The advantage of using a dual slope ADC in a digital voltmeter is that

Easy
1998 PYQ

For an ADC, match the following : if List 1 A. Flash converter B. Dual slope converter C. Successive approximation Converter List 2 1. requires a conversion time of the order of a few seconds 2. requires a digital- to- a...

Med
1996 PYQ

A 12-bit ADC is operating with a 1$$\mu $$ sec clock period and the total conversion time is seen to be 14 $$\mu $$ sec. The ADC must br of the

Easy
1994 PYQ

Match the List-1 (type of 8-bit ADC) with List-2(Minimum conversion time in clock cycles) List - 1 A. Successive approximation B. Dual-slope C. Parallel Comparator List - 2 1) 1 2) 8 3) 16 4) 256 5) 512

Med