MOSFET

An n-channel MOSFET is connected as shown in the Figure. Assume VTH = 1 V, VDD = 5 V, and μCox (W/L) = 2 mA V^-2 and neglect channel length modulation effects. The gate voltage (VG...

Which of the following statements is/are TRUE with respect to ideal MOSFET-based DC-coupled single-stage amplifiers having finite load resistors?

The identical MOSFETS M₁ and M₂ in the circuit given below are ideal and biased in the saturation region. M₁ and M₂ have a transconductance gₘ of 5 mS. The input signals (in Volts)...

Which of the following statements is/are TRUE with respect to ideal MOSFET-based DCcoupled single-stage amplifiers having finite load resistors?

For the closed loop amplifier circuit shown below, the magnitude of open loop low frequency small signal voltage gain is 40. All the transistors are biased in saturation. The curre...

In the circuit shown below, the transistors M₁ and M₂ are biased in saturation. Their small signal transconductances are g_m1 and g_m2 respectively. Neglect body effect, channel le...

An NMOS transistor operating in the linear region has IDS of 5 µA at VDS of 0.1 V. Keeping VGS constant, the VDS is increased to 1.5 V. Given that \mu_n C_{ox} \frac{W}{L} = 50 \mu...

In the circuit shown below, V₁ and V₂ are bias voltages. Based on input and output impedances, the circuit behaves as a

In the circuit below, the voltage VL is ________ V (rounded off to two decimal places).

Consider an ideal long channel nMOSFET (enhancement-mode) with gate length 10 $$\mu$$m and width 100 $$\mu$$m. The product of electron mobility ($$\mu$$ n ) and oxide capacitance p...

For an $n$-channel silicon MOSFET with 10 nm gate oxide thickness, the substrate sensitivity ( $\partial V_T / \partial\left|V_{B S}\right|$ ) is found to be $50 \mathrm{mV} / \mat...

In the circuits shown, the threshold voltage of each nMOS transistor is 0.6 V. Ignoring the effect of channel length modulation and body bias, the values of Vout1 and Vout2, respec...

Consider a long-channel MOSFET with a channel length 1 µm and width 10 µm. The device parameters are acceptor concentration N_A= 5 × 10¹⁶ cm⁻³, electron mobility µ_n=800 cm²/V-s, o...

In the circuit shown, the threshold voltages of the pMOS (|Vtp|) and nMOS (Vtn) transistors are both equal to 1 V. All the transistors have the same output resistance rds of 6 MΩ....

In the circuit shown, V₁ = 0 and V₂ = Vdd. The other relevant parameters are mentioned in the figure. Ignoring the effect of channel length modulation and the body effect, the valu...

An n-channel enhancement mode MOSFET is biased at V GS > V TH and V DS > (V GS - V TH ), where V GS is the gate-to-source voltage, V DS is the drain-to-source voltage and V TH is t...

Consider an n-channel MOSFET having width W, length L, electron mobility in the channel $$\mu_n$$ and oxide capacitance per unit area $$C_{ox}$$. If gate-to-source voltage V GS =0....

Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double of T1. Both the transistor are biased in the saturation region of operation, b...

Consider the following statements for a metal oxide semiconductor field effect transistor (MOSFET): P: As channel length reduces, OFF-state current increases. Q:As channel length r...

A long-channel NMOS transistor is biased in the linear region with V DS = 50 mV and is used as a resistance. Which one of the following statements is NOT correct?

Consider an n-channel metal oxide semiconductor field effect transistor (MOSFET) with a gate-to-source voltage of 1.8 V. Assume that $${W \over L} = 4,{\mu _{\rm N}}{C_{ox}} = 70 \...

Which one of the following processes is preferred to from the gate dielectric (SiO 2 ) of MOSFETs?

A MOSFET in saturation has a drain current of 1 mA for V DS =0.5V. If the channel length modulation coefficient is 0.05 V -1 , the output resistance (in k$$\Omega $$) of the MOSFET...

If fixed positive charges are present in the gate oxide of an n-channel enhancement type MOSFET, it will lead to

In MOSFET fabrication, the channel length is defined during the process of

A depletion type N -channel MOSFET is biased in its linear region for use as a voltage controlled resistor. Assume threshold voltage V TH = -0.5 V, V GS = 2.0 V, V DS = 5 V, W/L=10...

The slope of the I D vs. V GS curve of an n-channel MOSFET in linear region is 10 -3 $${\Omega ^{ - 1}}$$ at V DS = 0.1V. For the same device, neglecting channel length modulation,...

In a MOSFET operating in the saturation region, the channel length modulation effect causes

Which of the following is NOT associated with a P-N junction?

The drain of an n-channel MOSFET is shorted to the gate so that V GS = V DS . The threshold voltage (V T ) of MOSFET is 1 V. If the drain current (I D ) is 1 mA for V GS = 2 V, the...

When the gate-to-source voltage (V GS ) of a MOSFET with threshold voltage of 400 mV, working in saturation is 900 mV, the drain current is observed to be 1 mA. Neglecting the chan...

Channel current is reduced on application of a more positive voltage to the gate of a depletion mode n-channel MOSFET.

The threshold voltage of an n-channel MOSFET can be increased by