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memory-banks

GATE CSE & IT · Memory Hierarchy & Cache · 2006-2006

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Morris Mano / Patterson-Hennessy

Digital logic, datapath, memory hierarchy, instruction sets

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2006 PYQ

A $$CPU$$ has a cache with block size $$64$$ bytes. The main memory has $$k$$ banks, each bank being $$c$$ bytes wide. Consecutive $$c$$-byte chunks are mapped on consecutive banks...

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