Interrupts
GATE CSE & IT · Operating Systems - Process Management · 1987-2026
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All concepts →Consider the following two statements about interrupt handling mechanisms in a CPU. S1: In non-vectored interrupt mechanism, it usually takes more time to start the Interrupt Servi...
Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. T...
Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. T...
Which one of the following statements is FALSE?
Consider a process P running on a CPU. Which one or more of the following events will always trigger a context switch by the OS that results in process P moving to a non-running st...
Which one of the following statements is FALSE?
Consider a process P running on a CPU. Which one or more of the following events will always trigger a context switch by the OS that results in process P moving to a non-running st...
A keyboard connected to a computer is used at a rate of 1 keystroke per second. The computer system polls the keyboard every 10 ms (milli seconds) to check for a keystroke and cons...
Consider the following statements. I. Daisy chaining is used to assign priorities in attending interrupts. II. When a device raises a vectored interrupt, the CPU does polling to id...
A computer handles several interrupt sources of which of the following are relevant for this question. $$ * \,\,\,\,\,\,\,\,\,\,\,$$ Interrupt from $$CPU$$ temperature sensor (rais...
A Computer handles several interrupt sources of which the following are relevant for this question: $$ * \,\,\,$$ Interrupt from $$CPU$$ temperature sensor (raises interrupt if $$C...
A $$CPU$$ generally handles an interrupt by executing an interrupt service routine
Which one of the following is true for a $$CPU$$ having a single interrupt request line and single interrupt grant line?
Suppose a processor does not have any stack pointer register. Which of the following statements is true?
Which of the following does not interrupt a running process?
Which of the following is true?
Which of the following device should get higher priority on assigning interrupts?
The correct matching for the following pairs is (a) Disk scheduling $$\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,$$(1) Round robin (b) Batch processing $$\,\,\,\,\,\,\,\,\,\,\,\,\,\...
The correct matching for the following pairs is $$\,\,\,\,\,$$ List - $${\rm I}$$ (a) $$DMA$$ $$\,\,$$ $${\rm I}/O$$ (b) Cache (c) Interrupt $${\rm I}/O$$ (d) Condition Code Regist...
It gives non-uniform priority to various devices.
On receiving an interrupt from an $${\rm I}/O$$ device the $$CPU$$: