Concept drill
instruction-execution
GATE CSE & IT · Instruction Set Architecture · 2015-2021
2
PYQs
50%
keyed
0
elite explanations
2
years appeared
Study anchor
Morris Mano / Patterson-Hennessy
Digital logic, datapath, memory hierarchy, instruction sets
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All concepts →2021 PYQ
Consider the following instruction sequence where register R1, R2 and R3 are general purpose and MEMORY[X] denotes the content at the memory location X. Instruction Semantics Instr...
mediumbasic explanation
2015 PYQ
Consider a processor with byte-addressable memory. Assume that all registers, including Program Counter $$(PC)$$ and Program Status Word $$(PSW),$$ are of size $$2$$ bytes. A stack...
mediumanswer key