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GATE CSE & IT · Computer Architecture - Memory Hierarchy · 2015-2025
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All concepts →2025 Q53
A computer has a memory hierarchy consisting of two-level cache (L1 and L2) and a main memory. If the processor needs to access data from memory, it first looks into L1 cache. If t...
mediumanswer key
2022 PYQ
A cache memory that has a hit rate of 0.8 has an access latency 10 ns and miss penalty 100 ns. An optimization is done on the cache to reduce the miss rate. However, the optimizati...
easybasic explanation
2015 PYQ
Assume that for a certain processor, a read request takes $$50$$ nanoseconds on a cache miss and $$5$$ nanoseconds on a cache hit. Suppose while running a program, it was observed...
easy