DMA
GATE CSE & IT · Computer Architecture - DMA · 1990-2024
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All concepts →Consider a computer with a 4 MHz processor. Its DMA controller can transfer 8 bytes in 1 cycle from a device to main memory through cycle stealing at regular intervals. Which one o...
Which one of the following statements is FALSE?
Which one of the following statements is FALSE?
Consider a computer with a 4 MHz processor. Its DMA controller can transfer 8 bytes in 1 cycle from a device to main memory through cycle stealing at regular intervals. Which one o...
Which one of the following facilitates transfer of bulk data from hard disk to main memory with the highest throughput?
Consider a computer system with DMA support. The DMA module is transferring one 8-bit character in one CPU cycle from a device to memory through cycle stealing at regular intervals...
Consider the following statements. I. Daisy chaining is used to assign priorities in attending interrupts. II. When a device raises a vectored interrupt, the CPU does polling to id...
The size of the data count register of a $$DMA$$ controller is $$16$$ bits. The processor needs to transfer a file of $$29,154$$ kilobytes from disk to main memory. The memory is b...
On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer $$500$$ bytes from an $${\rm I}/O$$ device to mem...
On a non-pipe-lined sequential processor, a program segment, which is a part of the interrrupt service routine, is given to transfer $$500$$ bytes from an $${\rm I}/O$$ device to m...
Consider the disk drive with the following specifications $$16$$ surfaces, $$512$$ tracks/surface, $$512$$ sectors/track, $$1$$ $$KB/sector$$, rotation speed $$3000$$ $$rpm.$$ The...
A Hard disk with a transfer rate of $$10Mbytes/second$$ is constantly transferring data to memory using $$DMA.$$ The processor runs at $$600MHz$$ and takes $$300$$ and $$900$$ cloc...
Consider a disk with following specifications: $$20$$ surface, $$1000$$ tracks/surface, $$16$$ sectors/track, data density $$1$$ $$KB/sector,$$ rotation speed $$3000$$ $$rpm.$$ The...
The correct matching for the following pairs is $$\,\,\,\,\,$$ List - $${\rm I}$$ (a) $$DMA$$ $$\,\,$$ $${\rm I}/O$$ (b) Cache (c) Interrupt $${\rm I}/O$$ (d) Condition Code Regist...
Under paged memory management scheme simple lock and key memory protection arrangement may still be required if the $$........$$ processors do not have address mapping hardware.