Computer Architecture

Consider the real valued variables $X, Y$ and $Z$ represented using the IEEE 754 singleprecision floating-point format. The binary representations of $X$ and $Y$ in hexadecimal not...

Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. T...

The number -6 can be represented as 1010 in 4-bit 2's complement representation. Which of the following is/are CORRECT 2's complement representation(s) of -6?

Which of the following is/are part of an Instruction Set Architecture of a processor?

Consider a memory system with 1M bytes of main memory and 16K bytes of cache memory. Assume that the processor generates 20-bit memory address, and the cache block size is 16 bytes...

Three floating point numbers X, Y, and Z are stored in three registers Rx, Ry, and Rz, respectively in IEEE 754 single precision format as given below in hexadecimal: Rx = 0xC11000...

A computer has a memory hierarchy consisting of two-level cache (L1 and L2) and a main memory. If the processor needs to access data from memory, it first looks into L1 cache. If t...

Given a computing system with two levels of cache (L1 and L2) and a main memory. The first level (L1) cache access time is 1 nanosecond (ns) and the "hit rate" for L1 cache is 90%...

An application executes 6.4 × 10^8 number of instructions in 6.3 seconds. There are four types of instructions, the details of which are given in the table. The duration of a clock...

The format of a single-precision floating-point number as per the IEEE 754 standard is: Sign (1bit) Exponent (8 bits) Mantissa (23 bits) Choose the largest floating-point number am...

Consider a 5-stage pipelined processor with Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Register Writeback (WB) stages. Which of the fol...

A non-pipelined instruction execution unit operating at 2 GHz takes an average of 6 cycles to execute an instruction of a program P. The unit is then redesigned to operate on a 5-s...

A processor uses a 32-bit instruction format and supports byte-addressable memory access. The ISA of the processor has 150 distinct instructions. The instructions are equally divid...

Given the following binary number in 32-bit (single precision) IEEE-754 format: 00111110011011010000000000000000. The decimal value closest to this floating-point number is

The performance of a pipelined processor suffers if