Concept drill
cache-misses
GATE CSE & IT · Memory Hierarchy & Cache · 2004-2007
2
PYQs
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keyed
0
elite explanations
2
years appeared
Study anchor
Morris Mano / Patterson-Hennessy
Digital logic, datapath, memory hierarchy, instruction sets
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All concepts →2007 PYQ
Consider a machine with a byte addressable main memory of $${2^{16}}$$ bytes. Assume that a direct mapped data cache consisting of $$32$$ lines of $$64$$ bytes each is used in the...
hardanswer key
2004 PYQ
Consider a small two-way set-associative cache memory, consisting of four blocks. For choosing the block to be replaced, uses the least recently used $$(LRU)$$ scheme. The number o...
mediumanswer key