addressing-modes

Match each addressing mode in List I with a data element or an element of a data structure (in a high-level language) in List II: List-I List-II P. Immediate 1. Element of an array...

A processor with 16 general purpose registers uses a 32-bit instruction format. The instruction format consists of an opcode field, an addressing mode field, two register operand f...

Consider a hypothetical processor with an instruction of type $$LW$$ $$R1, 20(R2),$$ which during execution reads a $$32$$-bit word from memory and stores it in a $$32$$-bit regist...

Which of the following is/are true of the auto-increment addressing mode? $${\rm I}.\,\,\,$$ It is useful in creating self-relocating code $${\rm II}.\,\,\,$$ If it is included in...

Which of the following is/are true of the auto increment addressing mode? $$1.$$ It is useful in creating self relocating code $$2.$$ If it is included in an Instruction Set Archit...

Which of the following addressing modes are suitable for program relocation at run time? $$1.$$ Absolute addressing $$2.$$ Based addressing $$3.$$ Relative addressing $$4.$$ Indire...

Which of the following addressing modes are suitable for program relocation at run time? $$1.$$ Absolute addressing $$2.$$ Based addressing $$3.$$ Relative addressing $$4.$$ Indire...

Which is the most appropriate match for the items in the first column with the items in the second column? $$X.$$ Indirect Addressing $$Y.$$ Indexed Addressing $$Z.$$ Base Register...

The most appropriate matching for the following pairs $$X:$$ Indirect addressing $$Y:$$ Immediate addressing $$Z:$$ Auto decrement addressing is $$1:$$ Loops $$2:$$ Pointers $$3.$$...

A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this processor?